This command is called a Column Address Select we'll ignore row addresses for now. The memory chip now has to activate the column requested, which it does by sending the address down a cascade of logic gates to make a single write that connects to all the cells in the column. Depending on how it's implemented, there will be a certain amount of delay for each bit of address until the result comes out the other end.
This is called the CAS latency of the memory. Because those bits have to be examined sequentially, this process takes a lot longer than a processor cycle which usually has only a few transistors in sequence to wait for. It also takes a lot longer than a bus cycle which is usually a few times slower than a processor cycle. A CAS command on a typical memory chip is likely to take on the order of 5ns IIRC - it's been a while since I looked at timings , which is more than an order of magnitude slower than a, processor cycle.
Fortunately, we break addresses into three parts column, row, and bank which allows each part to be smaller and process those parts concurrently, otherwise the latency would be even longer. Processor cache, however, does not have this problem. Not only is it much smaller, so address translation is an easier job, it actually doesn't need to translate more than a small fragment of the address in some variants, none of it at all because it is associative.
That means that along side each cached line of memory, there are extra memory cells that store part or all of the address. Obviously this makes the cache even more expensive, but it means that all of the cells can be queried to see whether they have the particular line of memory we want simultaneously, and then the only one hopefully that has the right data will dump it onto a bus that connects the entire memory to the main processor core.
This happens in less than a cycle, because it is much simpler. One of the philosophies I studied was the obtain-maximum-throughput-in-minimum- hardware movement when we talk about any cache based memory, be it CPU cache, buffer cache or memory cache for that purpose. The CPU cache is a smaller, faster memory space which stores copies of the data from the most recently used main memory locations.
The buffer cache is a main memory area which stores copies of the data from the most recently used disk locations. The browser cache is directory or similar space which stores copies of the data from the most recently visited websites by users. Reference: How Computer Memory Works. Sign up to join this community.
The best answers are voted up and rise to the top. Stack Overflow for Teams — Collaborate and share knowledge with a private group. Create a free Team What is Teams? Learn more. Why is CPU cache memory so fast? Ask Question. Asked 7 years, 7 months ago. Active 5 years, 9 months ago. Viewed 43k times. Improve this question. They just see "main memory". Application programs don't contain instructions that say "store this in cache memory", or say "get this from virtual memory".
They only refer to the contents of main memory at a particular address. The hardware makes sure that the program gets or stores the correct byte, no matter where it really is.
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How does cache memory work? What are the types of cache memory? How can I upgrade my cache memory? Cache memory in computer systems is used to improve system performance.
Cache memory operates in the same way as RAM in that it is volatile. When the system is shutdown the contents of cache memory are cleared. Cache memory allows for faster access to data for two reasons:. The process of refreshing RAM means that it takes longer to retrieve data from main memory. Cache memory will copy the contents of some data held in RAM.
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